Audio and RF Intermediate Frequency VITA49 Recording Software
Figure – Data and control interfaces of the recording/reproducing system
– Composed of a digital signal recording system within a Commercial Off-The-Shelf (COTS) server
– Records Intermediate Frequency (IF) data, generated from monitoring receivers in wide and narrow bands
– Communications are carried out over 10 Gbps optical fiber links and 1Gbps Ethernet links.
– Records Digital audio from different hosts of the network
– Reproduces previously recorded digital audio and IF
– Different formats for IF data: raw, VITA49
– Audio reproduction using RTSP
– Development/Management tools: Jira, Git/SVN, EA, Visual Studio, Unit Testing, JMeter, Selenium, Jenkins and SonarQube.
Seven Solutions Quality Assurance Development
– Development framework based on a V life-cycle, following a Top-Down approach (from specifications to testing),
– Developed according to UNE-EN-ISO-9000, UNE-EN-ISO 900, PECAL 2110, PECAL 2210 and ISO/IEC 25010:2011.
– Quality assurance activities: Requirements capture and definition, analysis and functional design, architecture and technical design, coding and source control, testing and deployment plan, code quality.
– Continuous integration improving the traceability between requirements, design, implementation and integration.
Figure – Development life-cycle and tools
Time-sensitive networking stands out against existing fieldbuses and Ethernet-like alternatives as it consists of a number of enhancements over regular Ethernet networks brought forward by the IEEE standardization committee (TSN Working Group). This technology is designed along four main features:
a) The system-wide synchronization supplies a common network notion of time to synchronize the operation of the system nodes through a particularized implementation of the precision time protocol (PTP or IEEE-1588). This is known as gPTP timing and is described in the 802.1AS specification.
b) The bounded end-to-end latency can be guaranteed with the utilization of TSN traffic shapers such as the time-aware traffic shaper (TAS) defined in 802.1Qbv. Furthermore, delivery jitter can be reduced with the implementation of the frame preemption enhancement (802.1Qbu & 802.3br) of the Ethernet MAC.
c) The system-wide configuration and management is essential to leverage all the capabilities of TSN networks. As a rule of thumb, traffic identification rules for VLAN encapsulation (802.1Q) of TSN streams, routing and topology information, the activation of redundant paths, or GCL definitions have to be supplied.
This is usually achieved with resource reservation protocols such as 802.1Qcc or 802.1BA.
d) The redundant topology networks, which are often required in avionics networks, are also supported in TSN systems by following the 802.1CB recommendations. This allows the transmission of duplicate messages over different physical paths as an enhanced layer of protection for highly critical data following a very standard-based and cost-effective mechanims.
Time Sensitive Networking (TSN): Deterministic Ethernet
for next generation aerospace systems
The following case study shows an example of the expertise of the company in avionics systems, showing collaboration with GMV and PLD in the framework of different ESA projects. The goal is to develop a new candidate solution for time critical application busses, taking full advantage of the opportunity open for the ‘retiring’ of the MIL-BUS-1553 bus on this field. Seven Solutions has developed a Deterministic GEthernet network bus. It is implemented as FPGA IPCORE compliant with the TSN standards but with very light footprint, making it suitable for resources and cost optimized applications. Powered by the utilization of the ESA RTEMS OS, this solution provide the first accurate implementation of a IEEE-1588 protocol profile for this OS, as well as a deterministic and best-effort bus solution with redundant topologies and resilience features. This IPOCRE has been designed and developed by Seven Solutions upon system requirements and validation methods provided by GMV with a first use case identified on the MIURA 1 sounding rocket whose mission is to provide microgravity environment to payload experiments but also to provide a flying test bed for technologies that will fly with MIURA 5 micro launcher.
The proposed system is based on a FPGA unit based on Xilinx Zynq family and based on low cost COTS elements with extended environmental range capabilities. A four ports Ethernet board has been designed and validated for vibration and temperature conditions. Exhaustive testing has been done to guarantee the highest reliability on the rocket communications including analysis of key failures and worst case application scenarios. Some other key features of the proposed solutions are: